Hours 0910

• ceb_log todo BMdoc notes hours_1012 hours_1101 hours_1102 hours_1103 lifefix_log T

Oct 09

todo

• battery power specs to DG, need to locate old battery specs.
• create SP demo software version for testing 4pm Mon
• review LF data logs, fix envelope errors.

fri oct 9

• 12:15 - 1:20pm
  • review LF data, compose possible hypothis to cause of problem
  • develope parts lists/BOM for orders
• 5-9:00 -20
  • try to recover LF datafiles from linux box - not able to get samba or SSH access
  • develope parts lists/BOM for orders
  • place digikey order
  • contact PCB fab re shipping to new location

notes

[ROOT SSH]

thr oct 8

• 2:00p - 11:30
  • help ED to run LF, UDP term needs to be running
  • work out how UPS will interface to system. power off: 7pm-11pm Fri, 5pm-?? Sun
  • investigating tracking problems with LF.
  • getting LF running, create several new envelopes
  • make improvements (fix bugs) to run_lifefix.

wed oct 7

• 12:40-2:05
  • develop parts list for latest PCB fab project

• 6:15 - 8:40
  • explain to DG, test, correct backup ankle firmware. SWIFI has problem sending garbage
  • test PDA, find working BT. Need to locate 2 others.
  • charge batteries

• 11:05 - 2:45
  • test WOW ankles, replace bullet connector (test others), verify PDA operation
  • run LF, find problems with envelop.

notes

• WIP4C - change 8x3.55 cap to 220uF
• review PN for bussed resistors
• find a sub for the value 5.87k (5.90k?)
• find value for QY1
• change 22uh to 22u

tue oct 6

• install, experiment with eispice for simulation
• 2:40p - 11:30 -25
  • discuss project status w/ZH
  • meet w/DG - explain VS and KS loops, LF, we study backlash and photo disassembly
  • set up LF photos on webserver, setup software files for GG
  • investigate SG problem on TJ
  • review SG layout

mon oct 5

• 30 mins - developing switching power simulation
• 3:15- 5:45, -15
  • review IW0905 DRC errors, correct and submit
  • PCB submission accepted from SPE
  • ordered storage bins

• 6:15pm - 10:45, -45 mins
  • review time drift experiment, improve translation of log file to matlab.
  • meet w/RC re new hires, plans for each, etc
  • review MPD hardware design changes, email MR

sun oct 4

• 30 mins - developing switching power simulation
• 4:30pm- 7:20pm

sat oct 3

• 1am - 2am??
  • review LF stopped data, and restart
• 1pm - 2:45

• • analysis of LF log file (update program for new log format, correct errors.)
• 3:55 -
  • LF stopped after 11014 passes - review physical status of LF, appears okay.
  • the most direct observation of the cause of stop is that cycle timer counter stopped after 500 tics. Could be that SWIFI data wasn't received yet, or that the timer actually stopped!
  • belt is slipping and which causes the zero to drift - which causes the encoder trigger point to be missed.

Fri Oct 2

• 11:30a - 1:15p
  • review AVR report from PCB fab house. Errors need to be correct and resubmitted.

• 5:00p - 7:00 p
  • correct DRC mistakes, resubmit.

• LF stopped after 314278 passes (22:14pm)

Thur Oct 1

• 9-10:30
  • improve gnd grid, add plane for switcher, and correct poor routing issues w/WIP4C1.
• 4-8:15
  • improve manual routing of WIP4C1, manual route of VCC33, re run auto route
  • create a dclamp2 -
  • submit project to fab house for DRC analysis
• 9:30p - 2:15 a
  • review time drif experiment and improve output and start plotting
  • test LF, checking output data, build new envelope for 2000N
  • setup testjig to monitor copley (required reboot and serial cable was moved)
  • running lifefix w/trajectory enevelope testing and SWIFI logging to linux box.

notes

• Linear 7ns Comparator AN
• LT1116 7ns