Hours 0910
From DIDEAS Wiki
Oct 09
set oct 3
- 1am - 2am??
- review LF stopped data, and restart
- 1pm - 2:45
- analysis of LF log file (update program for new log format, correct errors.)
- 3:55 -
- LF stopped after 11014 passes - review physical status of LF, appears okay.
- the most direct observation of the cause of stop is that cycle timer counter stopped after 500 tics. Could be that SWIFI data wasn't received yet, or that the timer actually stopped!
Fri Oct 2
- 11:30a - 1:15p
- review AVR report from PCB fab house. Errors need to be correct and resubmitted.
- 5:00p - 7:00 p
- correct DRC mistakes, resubmit.
- LF stopped after 314278 passes (22:14pm)
Thur Oct 1
- 9-10:30
- improve gnd grid, add plane for switcher, and correct poor routing issues w/WIP4C1.
- 4-8:15
- improve manual routing of WIP4C1, manual route of VCC33, re run auto route
- create a dclamp2 -
- submit project to fab house for DRC analysis
- 9:30p - 2:15 a
- review time drif experiment and improve output and start plotting
- test LF, checking output data, build new envelope for 2000N
- setup testjig to monitor copley (required reboot and serial cable was moved)
- running lifefix w/trajectory enevelope testing and SWIFI logging to linux box.
