Difference between revisions of "Enc 2010"
From DIDEAS Wiki
m |
m |
||
| (3 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
| + | {{ceb_prj}} | ||
| + | Preliminary design info for the Renishaw encoder | ||
| + | =DOCs= | ||
*[http://ww1.microchip.com/downloads/en/DeviceDoc/PIC24F16KA102_Family_datasheet_39927b.pdf 24F16KA102 XLP] | *[http://ww1.microchip.com/downloads/en/DeviceDoc/PIC24F16KA102_Family_datasheet_39927b.pdf 24F16KA102 XLP] | ||
*[http://www.microchip.com/ParamChartSearch/chartdetail.aspx?branchID=143&mid=14&lang=en All XLP] | *[http://www.microchip.com/ParamChartSearch/chartdetail.aspx?branchID=143&mid=14&lang=en All XLP] | ||
*[http://www.renishaw.com/en/magnetic-rotary-encoders--9801 Renishaw magnetic encoders] | *[http://www.renishaw.com/en/magnetic-rotary-encoders--9801 Renishaw magnetic encoders] | ||
*[http://www.rls.si/default.asp?prod=am8192B1 AM8192B1 13 bit 0.5mm] | *[http://www.rls.si/default.asp?prod=am8192B1 AM8192B1 13 bit 0.5mm] | ||
| + | |||
| + | =howto= | ||
| + | *@ sample rate, read the SSI interface - gets most accurate position. max SSI clock rate = 4MHz. | ||
| + | *use IC to measure precise time of edges. | ||
| + | |||
| + | =connections= | ||
| + | *1 NC | ||
| + | *2 error - connect to ADC | ||
| + | *3,4 - trig outputs, can be LPF | ||
| + | *5 connected to Vref (16) to eanble built-in interpolator | ||
| + | *6 connect to pin 4 | ||
| + | *7 connect to pin 16 | ||
| + | *8 connect to pin 3 | ||
| + | * 9 connect to pin 16 | ||
| + | *10,14,24,27,33 : connect to Vdd | ||
| + | *11,15,23,25,26,30,31,32,43 : Vss | ||
| + | *12,13,17,21,22 : connect to Vss | ||
| + | *16 interpolator reference voltage generator - Vdd/2 | ||
| + | *18, 19, 20 A,B, RI QEI output | ||
| + | *28 NC | ||
| + | *29 SSI clock input | ||
| + | *34 connect to pin 16 | ||
| + | *35 NC | ||
| + | *36 10k to Vdd (system sensitivity) - need more understanding | ||
| + | *37 - SSI DOUT | ||
| + | *38 EEsda - | ||
| + | *39 EEscl | ||
| + | *40 NOerr - low -> no error | ||
| + | *41 connect to Vdd | ||
| + | *42 130k ohm to Vss | ||
| + | *44 Connect to Vss | ||
Latest revision as of 17:56, 2 September 2010
- garden12 ; emg_2009 ; Enc_2010 ; AKENC ; Kknee1 ; Br46_v1 gps1 ; lifefix ; battery ; loadwasher ; elecdog ; Brushless_control ; ceb_misc_prj ; pf_top_nav ; T
Preliminary design info for the Renishaw encoder
DOCs
howto
- @ sample rate, read the SSI interface - gets most accurate position. max SSI clock rate = 4MHz.
- use IC to measure precise time of edges.
connections
- 1 NC
- 2 error - connect to ADC
- 3,4 - trig outputs, can be LPF
- 5 connected to Vref (16) to eanble built-in interpolator
- 6 connect to pin 4
- 7 connect to pin 16
- 8 connect to pin 3
- 9 connect to pin 16
- 10,14,24,27,33 : connect to Vdd
- 11,15,23,25,26,30,31,32,43 : Vss
- 12,13,17,21,22 : connect to Vss
- 16 interpolator reference voltage generator - Vdd/2
- 18, 19, 20 A,B, RI QEI output
- 28 NC
- 29 SSI clock input
- 34 connect to pin 16
- 35 NC
- 36 10k to Vdd (system sensitivity) - need more understanding
- 37 - SSI DOUT
- 38 EEsda -
- 39 EEscl
- 40 NOerr - low -> no error
- 41 connect to Vdd
- 42 130k ohm to Vss
- 44 Connect to Vss
