Hours 1006
From DIDEAS Wiki
Contents
tue jun 1
- 8am - 9am
- continue debug of USE_AAS_SSI_MASTER_TIMER mode for AKENC
- 9:30 - 12:30 conference call
- 12:50 - 1pm HH
- 1pm - 6pm -30
- continue debug of USE_AAS_SSI_MASTER_TIMER mode for AKENC
- verify that cmd 123 0 will turn off switching of FETs
- compare noise from ADCs with SSI
- complete build 2691 - works with both ADC and SSI mode.
- work w/GG re installation of firmware
- discussion w/RC re status
wed jun 2
- 20 mins - preventative repair of SWIFI
- 10am - 7:30pm -30 mins
- kit and deliver components for AKENCxx; create DOCs
- reinstall all PIC tools on PC.15
- discuss AKENC3 status with GG and HH
- work w/GG and H2, find MC firmware version is old.
- investigate noise on sensor, caused by MC communications
thur jun 3
- several phone calls earlier in the day.
- 4:15pm - 11:15p (1 hr)
fri jun 4
- phone calls in the morning.
- 1pm-1:30p
- 3pm - 7pm
- recode MC firmware for RMB20 + MILE
- testing on H2
- 10:10pm - 11:20p
- retesting MILE, RMB20 code. find there is a timing anomaly due to new compiler removing NOPs. Add optimization detection.
sat jun 5
- 8:50a - 3pm
- discussion w/HH re status, BV
- investigate MILE encoder - seems to be 10 bits only - output remains high after 10th rising edge. - expected 16 bits
- [AMD256D01] 1.2uS min clock period, 0.6us min high,low, monoflop 16-22uS
- discuss betaangle calculation with RC, ZH. my test code beta_test.m doesn't seem to give meaningfull results.
- want to invert beta_angle calculation to go from AAS to motor rotations
- specify calibration constants required, along with method to obtain them for calb fixture.
- discuss calibration tables, EEPROM loging with GG.
sun jun 6
- 1 hr ; study the beta_calc problem with ZH
mon jun 7
- 50min - re-run beta test using theta0 = motorangle/210; email on same
tue jun 8
- 45 min re project status w/RC
wed jun 9
- 12:30 - 9:45pm -3 hrs
- contacted L-tronics re status of hardware
- experiment with SPI hardware for SSI slave
- CA calls about wire
- RC calls about imped offset
- ED calls about operation of VLIST, general questions about dataport interface.
- we need to rewrite class V2 packet to not read 512 bytes (hard to be real time!)
- would like to write an data source aggrigator
- receive AKENCxx PCAs; find that not all components in kit and BOM were populated; fixed AKENC3m
- RC/CA calls about RMB20 resolution