Difference between revisions of "Pcb checklist"
From DIDEAS Wiki
m |
m |
||
| Line 1: | Line 1: | ||
=before routing= | =before routing= | ||
| + | *make sure SMD pads do not fall into the route path. would like 5 mils from the board edge. | ||
| + | *make sure that edge pads and mouse bites are not adjacent. | ||
| + | *use better DFM to verify there are no stubs | ||
| + | *make sure that mounting holes to not have traces routed to them. possibly at a note that holes with targets are non-plated | ||
*turn on layer 8, the assembly, and mask layers and remove unwanted text. | *turn on layer 8, the assembly, and mask layers and remove unwanted text. | ||
*for the board outline, use 2 mill on the board layer | *for the board outline, use 2 mill on the board layer | ||
| Line 9: | Line 13: | ||
*view assembly and mask layers; verify there is no small text | *view assembly and mask layers; verify there is no small text | ||
*look at silk layers for small text | *look at silk layers for small text | ||
| + | |||
| + | |||
| + | =README FILE= | ||
| + | |||
| + | <pre> | ||
| + | |||
| + | * vias that connect top-bottom side traces must be fully masked. if necessary, please run the mask process twice to make sure there is no exposed copper. | ||
| + | |||
| + | * Holes with targets are non-plated mounting holes. | ||
| + | </pre> | ||
Latest revision as of 18:12, 3 February 2011
before routing
- make sure SMD pads do not fall into the route path. would like 5 mils from the board edge.
- make sure that edge pads and mouse bites are not adjacent.
- use better DFM to verify there are no stubs
- make sure that mounting holes to not have traces routed to them. possibly at a note that holes with targets are non-plated
- turn on layer 8, the assembly, and mask layers and remove unwanted text.
- for the board outline, use 2 mill on the board layer
- for route and retain use the title layer (60 mills wide)
- typically place 5 mounting holes of 10/20 spaced at 20 mills.
during panalization
- shrink mounting hole pads to just larger than the hole
- view assembly and mask layers; verify there is no small text
- look at silk layers for small text
README FILE
* vias that connect top-bottom side traces must be fully masked. if necessary, please run the mask process twice to make sure there is no exposed copper. * Holes with targets are non-plated mounting holes.
