Difference between revisions of "Enc 2010"

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*@ sample rate, read the SSI interface - gets most accurate position.  max SSI clock rate = 4MHz.  
 
*@ sample rate, read the SSI interface - gets most accurate position.  max SSI clock rate = 4MHz.  
 
*use IC to measure precise time of edges.
 
*use IC to measure precise time of edges.
 +
 +
=connections=
 +
*1 NC
 +
*2 error - connect to ADC
 +
*3,4 - trig outputs, can be LPF
 +
*5 connected to Vref (16) to eanble built-in interpolator
 +
*6 connect to pin 4
 +
*7 connect to pin 16
 +
*8 connect to pin 3
 +
* 9 connect to pin 16
 +
*10,14,24,27,33 : connect to Vdd
 +
*11,15,23,25,26,30,31,32,43 : Vss
 +
*12,13,17,21,22 : connect to Vss
 +
*16 interpolator reference voltage generator - Vdd/2
 +
*18, 19, 20 A,B, RI QEI output
 +
*28 NC
 +
*29 SSI clock input
 +
*34 connect to pin 16
 +
*35 NC
 +
*36 10k to Vdd (system sensitivity) - need more understanding
 +
*37 - SSI DOUT
 +
*38 EEsda -
 +
*39 EEscl
 +
*40 NOerr - low -> no error
 +
*41 connect to Vdd
 +
*42 130k ohm to Vss
 +
*44 Connect to Vss

Revision as of 00:13, 28 March 2010

howto

  • @ sample rate, read the SSI interface - gets most accurate position. max SSI clock rate = 4MHz.
  • use IC to measure precise time of edges.

connections

  • 1 NC
  • 2 error - connect to ADC
  • 3,4 - trig outputs, can be LPF
  • 5 connected to Vref (16) to eanble built-in interpolator
  • 6 connect to pin 4
  • 7 connect to pin 16
  • 8 connect to pin 3
  • 9 connect to pin 16
  • 10,14,24,27,33 : connect to Vdd
  • 11,15,23,25,26,30,31,32,43 : Vss
  • 12,13,17,21,22 : connect to Vss
  • 16 interpolator reference voltage generator - Vdd/2
  • 18, 19, 20 A,B, RI QEI output
  • 28 NC
  • 29 SSI clock input
  • 34 connect to pin 16
  • 35 NC
  • 36 10k to Vdd (system sensitivity) - need more understanding
  • 37 - SSI DOUT
  • 38 EEsda -
  • 39 EEscl
  • 40 NOerr - low -> no error
  • 41 connect to Vdd
  • 42 130k ohm to Vss
  • 44 Connect to Vss