Pic32

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Revision as of 17:54, 2 September 2010 by Ceb (talk | contribs) (Created page with " =notes on the pic32= =dsPIC in system timing (SVN revision 81)= *w/debug code appx 2.52mS *debug code off : 2.26mS *motor commands off : appx 2.18mS =PIC32 timing (SVN revisio...")
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notes on the pic32

dsPIC in system timing (SVN revision 81)

  • w/debug code appx 2.52mS
  • debug code off : 2.26mS
  • motor commands off : appx 2.18mS

PIC32 timing (SVN revision 81)

Using 32 bit code generation and -Os optimization

  • 2ws flash 78.64MHz - 500uS - fastest 100% in spec
  • 2ws flash, 83MHz - 472uS
  • 3ws flash, 83MHz - 500uS
  • 2ws flash, 103.2MHz = 382uS

Using 16 bit code generation and -Os optimization

  • 2ws flash, 103.2MHz = 422uS

Using 32 bit code generation and NO optimization

  • 2ws flash, 103.2MHz = 540uS

Using 16 bit code generation and NO optimization

  • 2ws flash, 103.2MHz = 566uS

Using 32 bit code generation and -OS "fastest" optimization

  • 2ws flash, 103.2MHz = 388uS

Using 32 bit code generation and -O2 optimization

  • 2ws flash, 103.2MHz = 390uS

Using 32 bit code generation and -O1 optimization

  • 2ws flash, 103.2MHz = 390uS


flash overclock

DS specs : 0WS for 0-30MHz, 1WS for 30 to 60MHz, and 2WS for 80MHz

  • 0WS flash, 41.7MHz - 818uS
  • 1ws flash, 83MHz - 440uS
  • 2ws flash, 125MHz - 316uS
  • 3ws flash, 140MHz - 300uS

PLL configs

CLK = 14.74MHz

  • 41Mhz = CLK / 3 * 17 / 2
  • 78MHz = CLK / 3 * 16
  • 83MHz = CLK / 3 * 17
  • 103MHz = CLK / 3 * 21
  • 125Mhz = CLK / 2 * 17
  • 140MHz = CLK / 2 * 19

PIC32 DOCS