Difference between revisions of "Kknee1"
From DIDEAS Wiki
m (→overclock) |
m (→overclock) |
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=timing= | =timing= | ||
*2WS flash 78.64MHz 500uS | *2WS flash 78.64MHz 500uS | ||
| − | ==overclock== | + | ==flash overclock== |
| + | DS specs : 0WS for 0-30MHz, 1WS for 30 to 60MHz, and 2WS for 80MHz | ||
| + | |||
*0WS flash, 41.7MHz - 818uS | *0WS flash, 41.7MHz - 818uS | ||
*1ws flash, 83MHz - 440uS | *1ws flash, 83MHz - 440uS | ||
Revision as of 18:08, 25 April 2010
todo
- order housings for all the connectors, including the 6x1mm
assembly notes
- white LED has black text marking the index pin (die is faintly visible also)
- add note to assembly docs
- QY1 needs to be installed upside down and slightly rotated, as pins 2 and 3 need to be flipped
- add note to assembly docs
errors
- PIC32 FUP, and SWIFI outputs need their serial ports swapped
- PIC32 FUP needs PGC and PGD swapped
timing
- 2WS flash 78.64MHz 500uS
flash overclock
DS specs : 0WS for 0-30MHz, 1WS for 30 to 60MHz, and 2WS for 80MHz
- 0WS flash, 41.7MHz - 818uS
- 1ws flash, 83MHz - 440uS
- 2ws flash, 83MHz - 472uS
- 3ws flash, 83MHz - 500uS
- 2ws flash, 125MHz - 316uS
- 3ws flash, 140MHz - 300uS
PLL configs
- 41Mhz = CLK / 3 * 17 / 2
- 78MHz = CLK / 3 * 16
- 83MHz = CLK / 3 * 17
- 125Mhz = CLK / 2 * 17
- 140MHz = CLK / 2 * 19
