Difference between revisions of "Kknee1"
From DIDEAS Wiki
m |
m (→overclock) |
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| Line 18: | Line 18: | ||
*2ws flash, 125Mhz - 316uS | *2ws flash, 125Mhz - 316uS | ||
*3ws flash, 140Mhz - 300uS | *3ws flash, 140Mhz - 300uS | ||
| + | |||
| + | ==PLL configs== | ||
| + | *41Mhz = CLK / 3 * 17 / 2 | ||
| + | *83mhz = CLK / 3 * 17 | ||
| + | *125Mhz = CLK / 2 * 17 | ||
| + | *140MHz = CLK / 2 * 19 | ||
Revision as of 18:06, 25 April 2010
todo
- order housings for all the connectors, including the 6x1mm
assembly notes
- white LED has black text marking the index pin (die is faintly visible also)
- add note to assembly docs
- QY1 needs to be installed upside down and slightly rotated, as pins 2 and 3 need to be flipped
- add note to assembly docs
errors
- PIC32 FUP, and SWIFI outputs need their serial ports swapped
- PIC32 FUP needs PGC and PGD swapped
overclock
- 0WS flash, 41.7Mhz - 818uS
- 1ws flash, 83Mhz - 440uS
- 2ws flash, 83Mhz - 472uS
- 3ws flash, 83Mhz - 500uS
- 2ws flash, 125Mhz - 316uS
- 3ws flash, 140Mhz - 300uS
PLL configs
- 41Mhz = CLK / 3 * 17 / 2
- 83mhz = CLK / 3 * 17
- 125Mhz = CLK / 2 * 17
- 140MHz = CLK / 2 * 19
